Everything you need to know about SRAM

SRAM was invented in 1963 at Fairchild Electronics and was the main driver behind the CMOS fabrication process that had been invented in 1959. More than 65 years later, the use of SRAM might be gradually declining, but it is still widely used today.

The main difference to DRAM is that it uses a latching circuitry that is also called a flip-flop to store each bit. This does not require a continuous power refresh resulting in low power consumption when the memory is idle (although it is higher during read and write access). Low power SRAM has been optimized for reduced power consumption during read and write operations.

However, the latch circuit requires six transistors, four to store a bit and two to control access to the cell. This structure is more complex and requires more physical space making SRAM more expensive per bit due to the reduced density of the memory.

The first SRAMs were asynchronous SRAMs, meaning that the memory devices do not depend on an external clock pulse. SRAM can be in three states, standby, reading, and writing. So as soon as it receives the instruction, it can read or write according to the instruction.

Asynchronous SRAM is widely used in CPU cache memory, hard drive buffers and network equipment such as switches and routers. It is also used in multiple features in printers, for example holding the image that is printed.

The need for speed and faster memory access in various electronic devices grew rapidly and led to the introduction of asynchronous fast SRAM (AFSRAM) in the mid-1990s. Better process technology and advanced design technologies led to improved performance and lower access times for high-speed applications without the overhead of a clock signal such as embedded systems, cache memory or graphic cards.

With the introduction of high-performing processors, microcontrollers and FBGAs asynchronous SRAM is increasingly becoming a bottleneck as it just takes too long to switch from the idle mode into read or write. For this reason, synchronous SRAM was introduced in the 1990s. It uses one or multiple clocks to align the access and cycle times to match that of the processor.

Pseudo-SRAM emerged as a solution to provide SRAM-like functionality at a lower cost as it is based on DRAM cells that are equipped with additional circuitry to mimic the characteristics of SRAM. This allows it to achieve similar speed and access times but with lower cost which was important for various applications, including consumer electronics and embedded systems, where SRAM was too expensive for larger memory sizes.

In automotive environments, SRAM usually is embedded directly into the microprocessor, microcontroller, or FBGA. While SRAM is more expensive per bit than DRAM, integrating the memory directly into the processor reduces the need for external memory chips. This improves the cost-effectiveness and overall power consumption of the chip.

In the over 60 years of its existence, SRAM has remained the memory of choice in applications where lower latency and reliability are prioritized. Embedded SRAM is still holding its ground as a high-performance memory that can be integrated alongside high-performing logic. However, SRAM's inability to scale commensurately with logic has led to power and performance challenges.

For this reason, emerging memory technologies like MRAM, FRAM and ReRAM are seeing increasing attention as SRAM replacements. MEMPHIS Electronic carries MRAM from Netsol and ReRAM and FRAM from RAMXEED. However, Winbond explores another alternative with its cube architecture which integrates DRAM, MRAM, and ReRAM.

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